Ericsson pursuing 'true' virtual RAN to avoid reliance on IntelEricsson pursuing 'true' virtual RAN to avoid reliance on Intel

Customers can have any chip they like as long as it's from Intel. The words are redolent of Henry Ford's famous remark about color choices for the all-black Model Ts that were rolling off production lines in the 1920s. And while the statement is invented, it makes for a quite accurate description of Ericsson's virtual radio access network (RAN) products 100 years later. Intel to the Swedish vendor is like black was to Ford.

Ericsson had effectively owned up to its dependency on the big US chipmaker in an open RAN progress report it published last November. In a table listing the available suppliers in different parts of the value chain, Intel stood out as the sole "commercial-grade" option for central processing units (CPUs), accelerators and network interface cards (NICs). Ericsson had reached only the "active engagement" stage with AMD and its Xilinx subsidiary, according to that same table. And not a single other chipmaker was named.

Ford loved black because the uniform approach was economical. That same logic would seem to apply in the RAN market. With Intel, Ericsson does not have to worry about dealing with other chipmakers and dividing resources between different types of silicon. Yet Intel's troubled situation is fueling anxiety among customers. After reporting a $1.7 billion profit in 2023, it suffered a huge net loss of $19.2 billion last year. Every week seems to bring fresh speculation about a sale of Intel business units, with Ericsson itself linked to a possible purchase of RAN assets.

Even before Intel's problems started to mount, the market for RAN silicon had been in flux. Ericsson and its big rivals continue to invest in the purpose-built chips used in most of today's 5G networks, a market also served by Intel, Marvell Technology and other merchant silicon vendors. But some licensees of Arm, which offers a design alternative to Intel's x86 architecture, also spy an opportunity in virtual RAN. Among them is Nvidia, the giant of the AI chips world. Its Grace Hopper and Grace Blackwell offers package Arm-based CPUs with graphical processing units (GPUs) for what Nvidia calls an AI RAN.

The lookaside versus inline wars

Ericsson's response to all this, including the uncertainty about Intel's future, is to push for as much separation of software from hardware as possible. "I don't know exactly how this is going to pan out – I don't have that crystal ball – but I also think that we've taken the problem away a bit by harmonizing software," said Fredrik Jejdling, the head of Ericsson's mobile networks business group, at an Ericsson event in London last week.

The company has stood by what Jejdling describes as a "lookaside" approach to virtual RAN. Essentially, that means nearly all the RAN software is handled by a general-purpose CPU, including most of the network functions in "Layer 1," the software slice greediest for IT resources. "Our Layer 1 can run on different types of underlying hardware and that is exactly to offer actual customers true cloud RAN through virtualization," said Jejdling.

The alternative, historically known as "inline," shifts the whole of this Layer 1 to a separate accelerator, where there is tighter linkage between hardware and software. It is preferred by Nokia, Ericsson's big Nordic rival, which runs its Layer 1 software on a chip codeveloped with Marvell. The NIC hosting this chip can be connected to any server that has a standard PCIe interface. While the higher-layer software looks as independent of hardware as Ericsson's, switching to another Layer 1 silicon vendor would necessitate a rewrite of code.

But full software independence looks hard to realize, even with lookaside. One problem is the use of accelerators to cope with forward error correction (FEC), an especially demanding part of the Layer 1 software stack. Ericsson relies on Intel's FEC accelerator in virtual RAN deployments with the chipmaker. Even if the rest of the Layer 1 code is reusable with an alternative CPU, the accelerator is not. In Sapphire Rapids EE, Intel's latest generation, it also comes integrated with the CPU, rather than on a separate NIC. And in Granite Rapids and Diamond Rapids, forthcoming CPU products, some beamforming, another Layer 1 function, will also move to the accelerator, according to Intel's roadmap.

Jejdling concedes that some Layer 1 alterations would be necessary if Ericsson moved from Intel to another chipmaker, but he insists the "lion's share" of the stack is "common" across platforms. "In Barcelona two or three years back, we took a cloud RAN stack at the time, built on Intel, and we ported it over to AMD with quite little change even in Layer 1," he said.

Executives at AMD, though, have been critical of Intel's recent accelerator moves. "They chose to integrate it, embedded on the board within the SoC [system-on-chip], and we think that's going to be quite limiting," said Nick Hancock, a director at AMD, in November. "We think it's going to be limiting in terms of how they scale that, and we think it's going to be quite limiting in terms of lock-in for customers in not a healthy way."

Arm wrestle

AMD at least uses the same x86 architecture as Intel. Just about everyone else falls into the Arm camp, and no big player except Ericsson has talked publicly about applying the lookaside approach to an Arm processor. Even Ericsson admitted about 18 months ago that Arm had seemed to lack the necessary horsepower for Layer 1.

At the time, its hope was that an architectural update called SVE2 would do for Arm processors what a technology known as AVX-512 has done for Intel's. "That is basically vector processing and is very suitable for Layer 1 processing and, when they get that in, we think we can squeeze some good capacity out of an Arm system," Matteo Fiorani, the head of virtual distributed units for Ericsson, told Light Reading in September 2023. Yet Ericsson still appears not to be in "active engagement" with any Arm licensees over virtual RAN.

From Oracle-backed Ampere Computing to Qualcomm, those Arm licensees have all backed the inline approach instead. Some, like Marvell and Qualcomm, have produced Layer 1 accelerators that feature combinations of Arm cores, digital signal processors and other custom hardware. Others, such as Ampere and AWS, are developing Arm-based CPUs for higher-layer functions.

But Intel doubts if there is much commonality between those CPUs. "Every variant of Arm is different and so Ampere's Arm product is different from AWS's Arm product," Sachin Katti, the general manager of Intel's network and edge group, told Light Reading in late 2023. "And, frankly, I don't think software you write for Ampere is easily portable to Arm running on AWS."

Then there is Nvidia, the world's most highly valued Arm licensee. It also prefers inline architecture and wants to see Layer 1 plus certain higher-layer functions handled by a Hopper or Blackwell GPU. It has written its own RAN software, dubbed Aerial, which supports Layer 1 for a trial deployment with SoftBank in Japan, where Fujitsu is responsible for providing higher-layer software and radio units.

But Nvidia regards Aerial only as a starting point and ideally wants both Ericsson and Nokia to contribute the Layer 1 expertise. This would, however, require the Nordic vendors to work with compute unified device architecture (CUDA), Nvidia's software platform. And that means the virtual RAN software written by Ericsson for Intel's x86 architecture would probably have to change. "They do have to reprofile into CUDA," said Soma Velayutham, the general manager of Nvidia's AI and telecom business, in December. "That is an effort."

Regardless of how this virtual RAN market evolves, analysts think purpose-built RAN will remain the default choice for many years. Dell'Oro recently predicted it would account for more than three quarters of the entire global market by 2029. Omdia, a Light Reading sister company, looks in broad agreement. When it last crunched the numbers in 2024, it was expecting purpose-built RAN to be used across about 80% of all RAN compute in 2028.

Ericsson, meanwhile, has continued to insist its purpose-built range of products will remain the most energy-efficient option for customers. "Historically, we've had two tracks, and if you build the track that is optimized you build it for that hardware that you tend to develop," said Jejdling. "Some customers may see an advantage in building another purpose-built hardware because there might be a better energy profile from that perspective. We're not going to be the judge of that."

Nevertheless, in the pursuit of efficiency, his goal in such a rapidly mutating and unpredictable chip sector is to avoid having multiple software tracks and excessive duplication of resources. "Customers will have a choice, and there will be different decision criteria based on the underlying compute platform they wish to use, but our software track is similar," he said. Multiple colors at the factory would have been the last thing Ford wanted to see.